HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 549

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HD6417615

Manufacturer Part Number
HD6417615
Description
Hardware Manual
Manufacturer
Hitachi Semiconductor
Datasheet

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13.1.4
Table 13.2 summarizes the three WDT registers. They are used to select the clock, switch the
WDT mode, and control the reset signal.
Table 13.2 Register Configuration
Name
Watchdog timer
control/status register
Watchdog timer
counter
Reset control/status
register
Notes: 1. Write by word access. It cannot be written by byte or longword access.
13.2
13.2.1
WTCNT is an 8-bit read/write register. The method of writing to WTCNT differs from that of
most other registers to prevent inadvertent rewriting. See section 13.2.4, Notes on Register Access,
for details. When the timer enable bit (TME) in the watchdog timer control/status register
(WTCSR) is set to 1, the watchdog timer counter starts counting pulses of an internal clock source
selected by clock select bits 2 to 0 (CKS2 to CKS0) in WTCSR. When the value of WTCNT
overflows (changes from H'FF to H'00), a watchdog timer overflow signal (WDTOVF) or interval
timer interrupt (ITI) is generated, depending on the mode selected in the WT/IT bit in WTCSR.
WTCNT is initialized to H'00 by a reset and when the TME bit is cleared to 0. It is not initialized
in standby mode, when the clock frequency is changed, or in clock pause mode.
Initial value:
2. Read by byte access. The correct value cannot be read by word or longword access.
3. Only 0 can be written in bit 7 to clear the flag.
Register Configuration
Register Descriptions
Watchdog Timer Counter (WTCNT)
R/W:
Bit:
Abbreviation R/W
WTCSR
WTCNT
RSTCSR
R/W
7
0
R/W
6
0
R/(W)*
R/W
R/(W)*
R/W
5
0
3
3
Initial Value
H'18
H'00
H'1F
R/W
4
0
R/W
3
0
Write*
H'FFFFFE80
H'FFFFFE80
H'FFFFFE82
R/W
1
2
0
Address
R/W
Read*
H'FFFFFE80
H'FFFFFE81
H'FFFFFE83
1
0
2
R/W
0
0
535

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