HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 382

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

When the contents of the way being used as cache are rewritten using a data array access, the
contents of external memory and cache will not match, so this operation should be avoided.
Number of bits
8.4.10
The address array of the cache can be accessed so that the contents fetched to the cache can be
checked for purposes of program debugging or the like. The address array is mapped on
H'60000000 to H'600003FF. Since all of the ways are mapped to the same addresses, ways are
selected by rewriting the W1 and W0 bits in CCR. The address array can only be accessed in
longwords.
When the address array is read, the tag address, LRU information, and valid bit are output as data.
When the address array is written to, the tag address, and valid bit are written from the cache
address bus. The write address must therefore be calculated before the write is performed. LRU
information is written from the cache data bus, but 0 must always be written to prevent
malfunctions.
366
Bit
Address
Data array read/write:
BA: Byte address within line
Address Array Access
Bit
Data
Number of bits
31
3
110
28
31
Figure 8.12 Data Array Access
Tag address
W: Way specification
19
Data
32
W
9
address
Entry
6
3
BA
4
0
0