HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 301

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

Table 7.5
CS0
CS1
CS2
CS3
CS4
When a wait is specified by software using WCR1 and WCR2 (Wn1, Wn0), and the external wait
mask bit (AnWM) is cleared to 0 in WCR2, the wait input WAIT signal from outside is sampled.
Figure 7.14 shows WAIT signal sampling. A 2-cycle wait is specified as a software wait. The
sampling is performed when the Tw state shifts to the T2 state, so there is no effect even when the
WAIT signal is asserted in the T1 cycle or the first Tw cycle. The WAIT signal is sampled at the
clock fall.
284
BCR3
A0LW2
A1LW2
AHLW2
AHLW2
A4LW2
CSn Spaces and Tw Specification Bits
BCR1
A0LW1
A1LW1
AHLW1
AHLW1
A4LW1
A0LW0
A2LW0
AHLW0
AHLW0
A4LW0
WCR1
W01
W11
W21
W31
—
W00
W10
W20
W30
—
WCR2
—
—
—
—
W41
—
—
—
—
W40
Tw
0–14
0–14
0–14
0–14
0–14