HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 412

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

9.2.19
MAFCR is a 16-bit counter that indicates the number of frames received with a multicast address
specified. When the value in this register reaches H'FFFF (65,535), the count is halted. The
counter value is cleared to 0 by a write to this register (the write value is immaterial).
Bits 31 to 16—Reserved: These bits are always read as 0. The write value should always be 0.
Bits 15 to 0—Multicast Address Frame Count 15 to 0 (MAFC15 to MAFC0): These bits indicate
the count of multicast frames received.
396
Initial value:
Initial value:
Initial value:
Multicast Address Frame Counter Register (MAFCR)
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
MAFC15 MAFC14 MAFC13 MAFC12 MAFC11 MAFC10 MAFC9
MAFC7
R/W
R/W
31
—
15
0
R
0
7
0
MAFC6
R/W
R/W
30
—
14
0
R
0
6
0
MAFC5
R/W
R/W
29
—
13
0
R
0
5
0
MAFC4
R/W
R/W
. . .
. . .
. . .
. . .
12
0
4
0
MAFC3
R/W
R/W
19
—
11
0
R
0
3
0
MAFC2
R/W
R/W
18
—
10
0
R
0
2
0
MAFC1
R/W
R/W
17
—
0
R
9
0
1
0
MAFC8
MAFC0
R/W
R/W
16
—
0
R
8
0
0
0