HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 375

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

8.4.2
Write-Through Mode: Writing to external memory is performed regardless of whether or not
there is a cache hit. The write address output to the cache address bus is used for comparison to the
tag address of the cache’s address array. If they match, the write data output to the cache data bus
in the following cycle is written to the cache data array. If they do not match, nothing is written to
the cache data array. The write address is output to the internal address bus 1 cycle later than the
cache address bus. The write data is similarly output to the internal data bus 1 cycle later than the
cache data bus. The CPU waits until the writes on the internal buses are completed (figure 8.5).
EX: Instruction execution
MA: Memory access
CPU pipeline
address bus
address bus
data bus
Write Access
data bus
Internal
Internal
Cache
Cache
stage
EX
Figure 8.5 Write Access (Write-Through)
Address A
Cache tag comparison
MA
EX
Address A
Address A
Address B
Data array write
Address A
MA
Address B
Address B
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