HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 71

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HD6417615

Manufacturer Part Number
HD6417615
Description
Hardware Manual
Manufacturer
Hitachi Semiconductor
Datasheet

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Table 2.12 CPU Instruction Addressing Modes and Effective Addresses (cont)
Addressing
Mode
Indirect register
addressing
with
displacement
Indirect indexed
register
addressing
Indirect GBR
addressing with
displacement
Instruction
Format
@(disp:4,
Rn)
@(R0, Rn) The effective address is the Rn value plus R0
@(disp:8,
GBR)
Effective Addresses Calculation
The effective address is Rn plus a 4-bit
displacement (disp). The value of disp is zero-
extended, and remains the same for a byte
operation, is doubled for a word operation, and is
quadrupled for a longword operation
The effective address is the GBR value plus an
8-bit displacement (disp). The value of disp is
zero-extended, and remains the same for a byte
operation, is doubled for a word operation, and
is quadrupled for a longword operation
(zero-extended)
(zero-extended)
1/2/4
Rn
R0
1/2/4
disp
GBR
disp
Rn
+
+
+
+ disp
+ disp
Rn + R0
GBR
Rn
1/2/4
1/2/4
Equation
Byte: Rn + disp
Word: Rn + disp
Longword: Rn +
disp
Rn + R0
Byte: GBR + disp
Word: GBR + disp
Longword: GBR +
disp
2
4
4
53
2

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