HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 774

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

Bit 3—Module Stop 9 (MSTP9): Specifies halting the clock supply to SIO channel 1. When the
MSTP9 bit is set to 1, the supply of the clock to SIO channel 1 is halted. When the clock halts,
SIO channel 1 retains its pre-halt state, and the SIO channel 1 interrupt vector register in the INTC
retains its pre-halt value. Therefore, when MSTP9 is cleared to 0 and the clock supply to SIO
channel 1 is restarted, operation starts again.
Bit 3: MSTP9
0
1
Bit 2—Module Stop 8 (MSTP8): Specifies halting the clock supply to SIO channel 0. When the
MSTP8 bit is set to 1, the supply of the clock to SIO channel 0 is halted. When the clock halts,
SIO channel 0 retains its pre-halt state, and the SIO channel 0 interrupt vector register in the INTC
retains its pre-halt value. Therefore, when MSTP8 is cleared to 0 and the clock supply to SIO
channel 0 is restarted, operation starts again.
Bit 2: MSTP8
0
1
Bit 1—Module Stop 7 (MSTP7): Specifies halting the clock supply to SCIF2. When the MSTP7
bit is set to 1, the supply of the clock to SCIF2 is halted. When the clock halts, the SCIF2 registers
are initialized, but the SCIF2 interrupt vector register in the INTC retains its pre-halt value.
Therefore, when MSTP7 is cleared to 0 and SCIF2 begins running again, it starts operating from
its initial state.
Bit 1: MSTP7
0
1
Bit 0—Module Stop 6 (MSTP6): Specifies halting the clock supply to SCIF1. When the MSTP6
bit is set to 1, the supply of the clock to SCIF1 is halted. When the clock halts, the SCIF1 registers
are initialized, but the SCIF1 interrupt vector register in the INTC retains its pre-halt value.
Therefore, when MSTP6 is cleared to 0 and SCIF1 begins running again, it starts operating from
its initial state.
Bit 0: MSTP6
0
1
764
Description
SIO channel 1 running
Clock supply to SIO channel 1 halted
Description
SIO channel 0 running
Clock supply to SIO channel 0 halted
Description
SCIF2 running
Clock supply to SCIF2 halted
Description
SCIF1 running
Clock supply to SCIF1 halted
(Initial value)
(Initial value)
(Initial value)
(Initial value)