HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 846
HD6417615
Manufacturer Part Number
HD6417615
Description
Hardware Manual
Manufacturer
Hitachi Semiconductor
Datasheet
1.HD6417615.pdf
(873 pages)
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21.3.12 STATS, BH, and BUSHIZ Signal Timing
Table 21.17 STATS, BH, and BUSHIZ Signal Timing
Conditions: V
Item
STAS1 and STAS0 output delay time
BHN output rising edge delay time
BHN output falling edge delay time
BUSHIZN setup time
BUSHIZN hold time
Output delay time of target pins
CKI0
Address
CS
STATS1, 0
CKI0
Address
BHN
V
CPU
CPU
CC
SS
= PV
= PLLV
G-DMAC
Read0
CPU
tBHNfd
SS
= PLLV
CC
= 3.3 V ±0.3 V, PV
E-DMAC E-DMAC E-DMAC
G-DMAC G-DMAC G-DMAC
Figure 21.80 STATS Output Timing
Read1
Figure 21.81 BHN Output Timing
tSTATd
SS
= 0 V, Ta = –20 to +75°C
tBHNrd
Read2
Symbol
tSTATd
tBHNrd
tBHNfd
tBHIZs
tBHIZh
tBHIZd
Read3
CC
= 5.0 V ± 0.5 V/3.3 V ±0.3 V, PV
Min
—
—
—
TBD
TBD
—
E-DMAC G-DMAC G-DMAC G-DMAC G-DMAC
G-DMAC G-DMAC
Write0
Typ
—
—
—
—
—
—
Write1
G-DMAC G-DMAC
Write2
Max
TBD
TBD
TBD
—
—
TBD
Write3
Unit
ns
ns
ns
ns
ns
ns
CC
V
CPU
Figure
21.80
21.81
21.82
CC
,
837
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