HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 496

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

Dual Address Mode
In dual address mode, both the transfer source and destination are accessed (selectable) by
address. The source and destination can be located externally or internally. The DMAC
accesses the source in the read cycle and the destination in the write cycle, so the transfer is
performed in two separate bus cycles. The transfer data is temporarily stored in the DMAC.
Figure 11.8 shows an example of a transfer between two external memories in which data is
read from one external memory in the read cycle and written to the other external memory in
the following write cycle.
In dual address mode transfers, external memory and memory-mapped external devices can be
mixed without restriction. Specifically, this enables transfers between the following:
Transfer between external memory and external memory
Transfer between external memory and memory-mapped external device
Transfer between memory-mapped external device and memory-mapped external device
Transfer between external memory and on-chip peripheral module (excluding DMAC,
Transfer between memory-mapped external device and on-chip peripheral module
Transfer between on-chip memory and on-chip memory
Transfer between on-chip memory and memory-mapped external device
Transfer between on-chip memory and on-chip peripheral module (excluding DMAC,
Transfer between on-chip memory and external memory
BSC, UBC, cache, E-DMAC, and EtherC)*
(excluding DMAC, BSC, UBC, cache, E-DMAC, and EtherC)*
BSC, UBC, cache, E-DMAC, and EtherC)*
Chip
Figure 11.8 Data Flow in Dual Address Mode
DMAC
1: Read cycle
2: Write cycle
External data bus
: Data flow
2
1
External
memory
External
memory
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