HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 13

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

11.4 Usage Examples ................................................................................................................. 507
11.5 Usage Notes ....................................................................................................................... 508
Section 12 16-Bit Free-Running Timer (FRT)
12.1 Overview............................................................................................................................ 509
12.2 Register Descriptions ......................................................................................................... 512
12.3 CPU Interface..................................................................................................................... 518
12.4 Operation............................................................................................................................ 521
12.5 Interrupt Sources................................................................................................................ 526
12.6 Example of FRT Use.......................................................................................................... 526
12.7 Usage Notes ....................................................................................................................... 527
Section 13 Watchdog Timer (WDT)
13.1 Overview............................................................................................................................ 533
11.3.5 Number of Bus Cycles.......................................................................................... 488
11.3.6 DMA Transfer Request Acknowledge Signal Output Timing ............................. 488
11.3.7 DREQn Pin Input Detection Timing .................................................................... 499
11.3.8 DMA Transfer End ............................................................................................... 505
11.3.9 BH Pin Output Timing ......................................................................................... 506
11.4.1 Example of DMA Data Transfer Between On-chip SCIF and
12.1.1 Features ................................................................................................................. 509
12.1.2 Block Diagram...................................................................................................... 510
12.1.3 Pin Configuration.................................................................................................. 511
12.1.4 Register Configuration.......................................................................................... 511
12.2.1 Free-Running Counter (FRC) ............................................................................... 512
12.2.2 Output Compare Registers A and B (OCRA and OCRB).................................... 512
12.2.3 Input Capture Register (FICR).............................................................................. 513
12.2.4 Timer Interrupt Enable Register (TIER)............................................................... 513
12.2.5 Free-Running Timer Control/Status Register (FTCSR) ....................................... 514
12.2.6 Timer Control Register (TCR).............................................................................. 516
12.2.7 Timer Output Compare Control Register (TOCR) ............................................... 517
12.4.1 FRC Count Timing ............................................................................................... 521
12.4.2 Output Timing for Output Compare ..................................................................... 522
12.4.3 FRC Clear Timing ................................................................................................ 522
12.4.4 Input Capture Input Timing .................................................................................. 523
12.4.5 Input Capture Flag (ICF) Setting Timing ............................................................. 524
12.4.6 Output Compare Flag (OCFA, OCFB) Setting Timing........................................ 524
12.4.7 Timer Overflow Flag (OVF) Setting Timing........................................................ 525
13.1.1 Features ................................................................................................................. 533
13.1.2 Block Diagram...................................................................................................... 534
13.1.3 Pin Configuration.................................................................................................. 534
13.1.4 Register Configuration.......................................................................................... 535
External Memory .................................................................................................. 507
.............................................................................. 533
............................................................ 509
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