HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 99

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

Table 2.21 Arithmetic Instructions (cont)
Instruction
SUB
SUBC
SUBV
Note: * The normal number of execution cycles. The number in parentheses is the number of
Table 2.22 Logic Operation Instructions
Instruction
AND
AND
AND.B
NOT
OR
OR
OR.B
TAS.B
TST
TST
TST.B
XOR
XOR
XOR.B
execution cycles in the case of contention with preceding or following instructions.
Rm,Rn
Rm,Rn
Rm,Rn
Rm,Rn
#imm,R0
Rm,Rn
Rm,Rn
#imm,R0
#imm,@(R0,GBR)
Rm,Rn
#imm,R0
Rm,Rn
#imm,R0
#imm,@(R0,GBR)
@Rn
#imm,@(R0,GBR)
#imm,@(R0,GBR)
Instruction Code
0011nnnnmmmm1000
0011nnnnmmmm1010
0011nnnnmmmm1011
Instruction Code
0010nnnnmmmm1001
11001001iiiiiiii
11001101iiiiiiii
0110nnnnmmmm0111
0010nnnnmmmm1011
11001011iiiiiiii
11001111iiiiiiii
0100nnnn00011011
0010nnnnmmmm1000
11001000iiiiiiii
11001100iiiiiiii
0010nnnnmmmm1010
11001010iiiiiiii
11001110iiiiiiii
Operation
Rn–Rm
Rn–Rm–T
Borrow
Rn–Rm
Underflow
Operation
Rn & Rm
R0 & imm
(R0 + GBR) & imm
(R0 + GBR)
~Rm
Rn | Rm
R0 | imm
(R0 + GBR) | imm
(R0 + GBR)
If (Rn) is 0, 1
1
Rn & Rm, if the result is
0, 1
R0 & imm, if the result is
0, 1
(R0 + GBR) & imm, if the
result is 0, 1
Rn ^ Rm
R0 ^ imm
(R0 + GBR) ^ imm
(R0 + GBR)
T
Rn
Rn,
MSB of (Rn)
Rn,
T
T
T
Rn
Rn
Rn
R0
Rn
R0
R0
T
T,
Cycles
1
1
1
Cycles
1
1
3
1
1
1
3
4
1
1
3
1
1
3
T Bit
—
Borrow
Underflow
T Bit
—
—
—
—
—
—
—
Test
result
Test
result
Test
result
Test
result
—
—
—
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