HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 430

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

10.2
10.2.1
The E-DMAC mode register specifies the operating mode of the E-DMAC. The settings in this
register are normally made in the initialization process following a reset.
Note: Operating mode settings must not be changed while the transmitter and receiver are
Bits 31 to 6—Reserved: These bits should only be written with 0.
Bits 5 and 4—Descriptor Length 1, 0 (DL1, DL0): These bits specify the descriptor length,
Bit 5:
DL1
0
1
Bits 3 to 1—Reserved: These bits should only be written with 0.
Bit 0—Software Reset (SWR): The EtherC and E-DMAC can be initialized by software. These
bits should only be written with 0.
Initial value:
Initial value:
enabled. To change the operating mode, first return the EtherC and E-DMAC modules to
their initial state by means of the software reset bit (SWR) in this register, then make new
settings.
Register Descriptions
E-DMAC Mode Register (EDMR)
Bit 4:
DL0
0
1
0
1
R/W:
R/W:
Bit:
Bit:
31
—
—
—
—
Description
16 bytes
32 bytes
64 bytes
Reserved (setting prohibited)
0
7
0
30
—
—
—
—
0
6
0
DL1
R/W
29
—
—
0
5
0
DL0
R/W
. . .
. . .
. . .
. . .
4
0
11
—
—
—
—
0
3
0
10
—
—
—
—
0
2
0
—
—
—
—
9
0
1
0
(Initial value)
SWR
R/W
—
—
8
0
0
0
415