HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 229
HD6417615
Manufacturer Part Number
HD6417615
Description
Hardware Manual
Manufacturer
Hitachi Semiconductor
Datasheet
1.HD6417615.pdf
(873 pages)
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Break address mask register C (BAMRC) consists of two 16-bit readable/writable registers: break
address mask register CH (BAMRCH) and break address mask register CL (BAMRCL).
BAMRCH specifies which bits of the break address set in BARCH are to be masked, and
BAMRCL specifies which bits of the break address set in BARCL are to be masked. Operation
also depends on bits XYEC and XYSC in BBRC as shown below.
BAMRC Configuration
XYEC = 0
XYEC = 1
Bits 31 to 0:
BAMCn
0
1
Note: n = 31 to 0
Address
X address
(when XYSC = 0)
Y address
(when XYSC = 1
Description
Channel C break address bit BACn is included in break condition (Initial value)
Channel C break address bit BACn is masked, and not included in condition
Upper 16 Bits
(BAMC31 to BAMC16)
Upper 16 bits maskable
Maskable
—
(BAMC15 to BAMC0)
Lower 16 bits maskable
—
Maskable
Lower 16 Bits
211
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