HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 723

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

Contention between TCNT Write and Overflow/Underflow: If there is an up-count or down-
count in the T2 state of a TCNT write cycle, and overflow/underflow occurs, the TCNT write
takes precedence and the TCFV/TCFU flag in TSR is not set .
Figure 16.53 shows the operation timing in the case of contention between a TCNT write and
overflow.
Multiplexing of I/O Pins: In the Chip, the TCLKA input pin is multiplexed with the TIOCC0 I/O
pin, the TCLKB input pin with the TIOCD0 I/O pin, the TCLKC input pin with the TIOCB1 I/O
pin, and the TCLKD input pin with the TIOCB2 I/O pin. When an external clock is input,
compare match output should not be performed from a multiplexed pin.
Interrupts and Module Stop Mode: If module stop mode is entered when an interrupt has been
requested, it will not be possible to clear the CPU interrupt source or DMAC activation source.
Interrupts should therefore be disabled before entering module stop mode.
P
Address
Write signal
TCNT
TCFV flag
Figure 16.53 Contention between TCNT Write and Overflow
H'FFFF
TCNT write cycle
Disabled
T1
TCNT address
T2
M
TCNT write data
711