HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 377

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

data bus
data bus
When the update bit of an entry to be replaced in write-back mode is 1, write-back to external
memory is necessary. To improve performance, the entry to be replaced is first transferred to the
write-back buffer, and fetching of the new entry into the cache is given priority over the write-
back. When the new entry has been fetched into the cache, the write-back buffer contents are
written back to external memory. The cache can be accessed during this write-back.
The write-back buffer can hold one cache line (16 bytes) of data and its address. The configuration
of the write-back buffer is shown in figure 8.8.
address
address
pipeline
Internal
Internal
EX: Instruction execution
MA: Memory access
Cache
Cache
stage
CPU
bus
bus
A (31–4):
Longwords 0–3: One cache line of data for write-back to external memory
EX
Address A
Figure 8.7 Write Access in Case of a Cache Miss (Write-Back)
A (31–4)
Cache tag comparison
MA
EX
Address for write-back to external memory
Figure 8.8 Write-Back Buffer Configuration
Longword 0
Address A
+4
Address A
Address A
Longword 1
+4
+8
Data array write
Address B
Address A
Address A
Address A
+12
+8
Longword 2
Address A
Address A
+12
Address A
Longword 3
Cache tag comparison
MA
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