HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 580

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

Bit 0—Overrun Error (ORER): Indicates that an overrun error occurred during reception, causing
abnormal termination.
Bit 0: ORER
0
1
Notes: 1. The ORER flag is not affected and retains its previous state when the RE bit in SCSCR
14.2.9
The bit rate register (SCBRR) is an 8-bit register that sets the serial transmit/receive bit rate in
accordance with the baud rate generator operating clock selected by bits CKS1 and CKS0 in the
serial mode register (SCSMR).
SCBRR can be read or written to by the CPU at all times.
SCBRR is initialized to H'FF by a reset, by the module standby function, and in standby mode.
The SCBRR setting is found from the following equations.
Initial value:
2. The receive data prior to the overrun error is retained in SCFRDR, and the data
Bit Rate Register (SCBRR)
is cleared to 0.
received subsequently is lost. Serial reception cannot be continued while the ORER flag
is set to 1. Also, serial transmission cannot be continued in synchronous mode.
R/W:
Bit:
Description
Reception in progress, or reception has ended normally*
[Clearing conditions]
An overrun error occurred during reception*
[Setting condition]
When the next serial receive operation is completed while there are 16 receive
data bytes in SCFRDR
R/W
7
1
In a reset or in standby mode
When 0 is written to ORER after reading ORER = 1
R/W
6
1
R/W
5
1
R/W
4
1
R/W
3
1
2
R/W
2
1
1
R/W
1
1
(Initial value)
R/W
0
1
567