HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 544

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HD6417615

Manufacturer Part Number
HD6417615
Description
Hardware Manual
Manufacturer
Hitachi Semiconductor
Datasheet

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4. Internal Clock Switching and Counter Operation
FRC will sometimes begin incrementing because of the timing of switching between internal
clocks. Table 12.4 shows the relationship between internal clock switching timing (CKS1 and
CKS0 bit rewrites) and FRC operation.
When an internal clock is used, the FRC clock is generated when the falling edge of an internal
clock (created by dividing the system clock ( )) is detected. When a clock is switched to high
before the switching and to low after switching, as shown in case 3 in table 12.4, the
switchover is considered a falling edge and an FRC clock pulse is generated, causing FRC to
increment. FRC may also increment when switching between an internal clock and an external
clock.
Figure 12.16 Contention between OCR and Compare Match
Compare match
Internal write
Address
signal
signal
OCR
FRC
P
FRC lower-byte write cycle
OCR address
N
N
Write data
N + 1
M
Disabled
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