HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 276

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HD6417615

Manufacturer Part Number
HD6417615
Description
Hardware Manual
Manufacturer
Hitachi Semiconductor
Datasheet

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Bits 2 to 0—Enable for DRAM and Other Memory (DRAM2–DRAM0)
DRAM2
0
1
Table 7.4
BCR3
AnLW2
0
1
Note: n = 0 to 4
AHLW2, AHLW1, and AHLW0 are common to CS2 and CS3.
DRAM1
0
1
0
1
Wait Values Corresponding to BCR1 and BCR3 Register Settings (All Spaces)
AnLW1
0
1
0
1
DRAM0
0
1
0
1
0
1
0
1
BCR1
AnLW0
0
1
0
1
0
1
0
1
Description
CS2 and CS3 are ordinary spaces
CS2 is ordinary space; CS3 is synchronous DRAM space
CS2 is ordinary space; CS3 is DRAM space
Reserved (do not set)
CS2 is synchronous DRAM space, CS3 is ordinary space
CS2 and CS3 are synchronous DRAM spaces
Reserved (do not set)
Reserved (do not set)
Wait Value
3 cycles inserted
4 cycles inserted
5 cycles inserted
6 cycles inserted
8 cycles inserted
10 cycles inserted
12 cycles inserted
14 cycles inserted
(Initial value)
(Initial value)
259

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