HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 243

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HD6417615

Manufacturer Part Number
HD6417615
Description
Hardware Manual
Manufacturer
Hitachi Semiconductor
Datasheet

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6.2.19
BRCRH
BRCRL
The break control register (BRCR) is used to make the following settings:
1. Setting of independent channel mode or sequential condition mode for channels A, B, C, and D
4. Selection of pre- or post-instruction-execution break in case of an instruction fetch cycle
3. Selection of whether the data bus is to be included in the comparison conditions for channels C
4. Selection of whether an execution-times break is to be set for channels C and D
5. Selection of whether a PC trace is to be executed
BRCR also contains flags that are set when a condition is satisfied. BRCR is initialized to
H'00000000 by a power-on reset; after a manual reset, its value is undefined.
and D
Initial value:
Initial value:
Initial value:
Initial value:
Break Control Register (BRCR)
R/W:
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
Bit:
CMFCA CMFPA
CMFCB CMFPB
CMFCC CMFPC ETBEC
CMFCD CMFPD ETBED
R/W
R/W
R/W
R/W
15
15
0
7
0
0
7
0
R/W
R/W
R/W
R/W
14
14
0
6
0
0
6
0
R/W
R/W
R/W
R/W
13
13
0
5
0
0
5
0
SEQ1
R/W
R/W
R/W
R/W
12
12
0
4
0
0
4
0
DBEC
DBED
PCTE
SEQ0
R/W
R/W
R/W
R/W
11
11
0
3
0
0
3
0
PCBA
PCBB
PCBC
PCBD
R/W
R/W
R/W
R/W
10
10
0
2
0
0
2
0
R/W
R/W
R/W
R/W
9
0
1
0
9
0
1
0
R/W
R/W
R/W
R/W
8
0
0
0
8
0
0
0
225

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