HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 23

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HD6417615

Manufacturer Part Number
HD6417615
Description
Hardware Manual
Manufacturer
Hitachi Semiconductor
Datasheet

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Table 1.1
Item
User break
controller (UBC),
4 channels
(A, B, C, D)
Features (cont)
Specifications
Interrupt generation based on independent or sequential conditions for
channels A, B, C, D
Settable break conditions: Address, data (channels C and D only), bus
master (CPU/DMAC), bus cycle (instruction fetch/data access), read/write,
operand cycle (byte/word/longword)
User break interrupt generated on occurrence of break condition
Processing can be stopped before or after instruction execution in
instruction fetch cycle
Break with specification of number of executions (channels C and D only)
Settable number of executions: max. 2
PC trace function
Branch source/branch destination can be traced in branch instruction fetch
(max. 8 addresses (4 pairs))
Three sequential setting patterns: A
C
D
12
– 1 (4095)
B
C
D, B
C
D,
5

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