HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 342
HD6417615
Manufacturer Part Number
HD6417615
Description
Hardware Manual
Manufacturer
Hitachi Semiconductor
Datasheet
1.HD6417615.pdf
(873 pages)
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7.6.5
In addition to the ordinary mode of DRAM access, in which row addresses are output at every
access and data is then accessed, DRAM also has a high-speed page mode for use when
continuously accessing the same row that enables fast access of data by changing only the column
address after the row address is output. Select ordinary access or high-speed page mode by setting
the burst enable bit (BE) in MCR. Figure 7.40 shows the timing of burst access in high-speed page
mode. When performing burst access, cycles can be inserted using the wait state control function.
Read
Write
Note: * DACKn waveform when active-low is specified
Burst Access
CKIO
A24–A16
A15–A1
RAS
CASn
RD/WR
RD
D31–D0
RD/WR
RD
D31–D0
DACKn *
WAIT
Tp
Figure 7.39 External Wait State Timing
Tr
Tc1
Tw
Twx
Tc2
325
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