HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 647

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

Bit 1—Transmit Data Register Empty (TDRE): Flag that indicates that the SITDR register is
empty and the next data can be written.
Bit 1: TDRE
0
1
Bit 0—Receive Data Register Full (RDRF): Flag that indicates that SIRDR receive data is waiting.
Bit 0: RDRF
0
1
634
Description
SITDR transmit data is valid
TDRE is cleared to 0 in the following cases:
SITDR transmit data is invalid
TDRE is set to 1 in the following cases:
Description
SIRDR receive data is invalid
RDRF is cleared to 0 in the following cases:
SIRDR receive data is valid
RDRF is set to 1 when serial data reception ends normally and the data is
transferred from SIRSR to SIRDR
When 0 is written to the TDRE bit after reading TDRE = 1
When the DMAC writes data to SITDR
When data is transferred from SITDR to SITSR
When the TE bit is cleared to 0 in the serial control register (SICTR)
When the processor enters the reset state
When the DMAC reads data from SIRDR
When 1 is read from RDRF and 0 is written
When the RE bit is cleared to 0 in the serial control register (SICTR)
When the processor enters the reset state
(Initial value)
(Initial value)