HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 383

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

8.5
8.5.1
Cache memory is not initialized in a reset. Therefore, the cache must be initialized by software
before use. The cache is initialized by zeroizing all address array valid bits and LRU information.
The address array write function can be used to initialize each line, but it is simpler to initialize it
once by writing 1 to the CP bit in CCR. Figure 8.14 shows how to initialize the cache.
Number of bits
Number of bits
Bit
Address
Bit
Address
MOV.W
MOV.B
AND
OR
OR
MOV.B
MOV.B
MOV.B
Address array read:
Address array write:
V: Valid bit
Cache Use
Initialization
Number of bits
Number of bits
Bit
Bit
Data
Data
#H'FE92, R1
@R1, R0
#H'FE, R0
#H'10, R0
#H'01, R0
#R0, @R1
R0, @R1
R0, R1
31
31
3
3
011
011
28
28
31
3
31
;
;
;
;
Figure 8.13 Address Array Access
;
—
Figure 8.14 Cache Initialization
Cache disable
Cache purge
Cache enable
28
Tag address
—
19
19
Tag address
19
—
22
9
9
address
address
Entry
Entry
6
6
3 2
— V
1 1 2
3
9
—
4
information
9
information
1
—
LRU
0
0
6
6
LRU
3 2
— V
1 1 2
3
—
4
1
367
—
0
0