HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 447

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

10.2.10 Tx FIFO Threshold Register (TFTR)
TFTR specifies the Tx FIFO threshold at which the first transmission is started. The actual
threshold is 4 times the set value. The EtherC starts transmission when the amount of data in the
TxFIFO exceeds the number of bytes specified by this register, when the TxFIFO is full, or when
1-frame write is executed.
Note: When setting this register, do so in the transmission-halt state.
Bits 31 to 11—Reserved: These bits should only be written with 0.
432
Initial value:
Initial value:
Initial value:
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
TFT7
R/W
31
—
—
15
—
—
0
0
7
0
TFT6
R/W
30
—
—
14
—
—
0
0
6
0
TFT5
R/W
29
—
—
13
—
—
0
0
5
0
TFT4
R/W
. . .
. . .
. . .
. . .
12
—
—
0
4
0
TFT3
R/W
19
—
—
11
—
—
0
0
3
0
TFT10
TFT2
R/W
R/W
18
—
—
10
0
0
2
0
TFT9
TFT1
R/W
R/W
17
—
—
0
9
0
1
0
TFT8
TFT0
R/W
R/W
16
—
—
0
8
0
0
0