DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 106

• Manufacturer Part Number: DF3052BX25V
• Description: MCU 5V 512K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of DF3052BX25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 4 Exception Handling
4.3
Interrupt exception handling can be requested by seven external sources (NMI, IRQ
30 internal sources in the on-chip supporting modules. Figure 4.5 classifies the interrupt sources
and indicates the number of interrupts of each type.
The on-chip supporting modules that can request interrupts are the watchdog timer (WDT), refresh
controller, 16-bit integrated timer unit (ITU), DMA controller (DMAC), serial communication
interface (SCI), and A/D converter. Each interrupt source has a separate vector address.
NMI is the highest-priority interrupt and is always accepted. Interrupts are controlled by the
interrupt controller. The interrupt controller can assign interrupts other than NMI to two priority
levels, and arbitrate between simultaneous interrupts. Interrupt priorities are assigned in interrupt
priority registers A and B (IPRA and IPRB) in the interrupt controller.
For details on interrupts see section 5, Interrupt Controller.
Rev. 3.00 Mar 21, 2006 page 76 of 814
REJ09B0302-0300
Notes: Numbers in parentheses are the number of interrupt sources.
Interrupts
1.
2.
Interrupts
When the watchdog timer is used as an interval timer, it generates an interrupt
request at every counter overflow.
When the refresh controller is used as an interval timer, it generates an interrupt
request at compare match.
Figure 4.5 Interrupt Sources and Number of Interrupts
External interrupts
Internal interrupts
NMI (1)
IRQ to IRQ (6)
WDT
Refresh controller
ITU (15)
DMAC (4)
SCI (8)
A/D converter (1)
0
*1
(1)
5
*2
(1)
0
to IRQ
5
) and