DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 514

• Manufacturer Part Number: DF3052BX25V
• Description: MCU 5V 512K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of DF3052BX25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 13 Serial Communication Interface
Rev. 3.00 Mar 21, 2006 page 484 of 814
REJ09B0302-0300
Receiving Serial Data
follow. When switching from asynchronous mode to synchronous mode, make sure that the
ORER, PER, and FER flags are cleared to 0. If the FER or PER flag is set to 1 the RDRF flag
will not be set and both transmitting and receiving will be disabled.
Figure 13.18 shows a sample flowchart for receiving serial data and indicates the procedure to
No
No
Read ORER flag in SSR
Clear RE bit to 0 in SCR
Read RDRF flag in SSR
RDRF flag to 0 in SSR
from RDR, and clear
Read receive data
Start receiving
ORER = 1?
RDRF = 1?
receiving?
Finished
Initialize
Figure 13.18 Sample Flowchart for Serial Receiving (1)
End
Yes
Yes
No
continued on next page
Yes
Error handling
1
2
4
5
3
1. SCI initialization: the receive data function
2, 3. Receive error handling: if a receive error
4. SCI status check and receive data read:
5. To continue receiving serial data: check the
of the RxD pin is selected automatically.
occurs, read the ORER flag in SSR, then
after executing the necessary error
handling, clear the ORER flag to 0. Neither
transmitting nor receiving can resume
while the ORER flag remains set to 1.
read SSR, check that the RDRF flag is set
to 1, then read receive data from RDR and
clear the RDRF flag to 0. Notification that
the RDRF flag has changed from 0 to 1 can
also be given by the RXI interrupt.
RDRF flag, read RDR, and clear the RDRF
flag to 0 before the MSB (bit 7) of the
current frame is received. If the DMAC is
activated by a receive-data-full interrupt
request (RXI) to read RDR, the RDRF flag
is cleared automatically.