DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 17

• Manufacturer Part Number: DF3052BX25V
• Description: MCU 5V 512K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of DF3052BX25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 1 Overview
1.1
1.2
1.3
Section 2 CPU
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
Overview...........................................................................................................................
Block Diagram ..................................................................................................................
Pin Description..................................................................................................................
1.3.1
1.3.2
1.3.3
Overview........................................................................................................................... 19
2.1.1
2.1.2
CPU Operating Modes ...................................................................................................... 21
Address Space ................................................................................................................... 22
Register Configuration ...................................................................................................... 23
2.4.1
2.4.2
2.4.3
2.4.4
Data Formats ..................................................................................................................... 27
2.5.1
2.5.2
Instruction Set ................................................................................................................... 30
2.6.1
2.6.2
2.6.3
2.6.4
2.6.5
Addressing Modes and Effective Address Calculation ..................................................... 44
2.7.1
2.7.2
Processing States............................................................................................................... 51
2.8.1
2.8.2
2.8.3
2.8.4
2.8.5
Pin Arrangement ..................................................................................................
Pin Assignments in Each Mode ...........................................................................
Pin Functions ....................................................................................................... 13
Features................................................................................................................ 19
Differences from H8/300 CPU ............................................................................ 20
Overview.............................................................................................................. 23
General Registers ................................................................................................. 24
Control Registers ................................................................................................. 25
Initial CPU Register Values................................................................................. 26
General Register Data Formats ............................................................................ 27
Memory Data Formats ......................................................................................... 29
Instruction Set Overview ..................................................................................... 30
Instructions and Addressing Modes ..................................................................... 31
Tables of Instructions Classified by Function...................................................... 32
Basic Instruction Formats .................................................................................... 42
Notes on Use of Bit Manipulation Instructions.................................................... 43
Addressing Modes ............................................................................................... 44
Effective Address Calculation.............................................................................. 47
Overview.............................................................................................................. 51
Program Execution State...................................................................................... 52
Exception-Handling State .................................................................................... 52
Exception-Handling Sequences ........................................................................... 54
Bus-Released State............................................................................................... 55
...................................................................................................................... 19
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Contents
Rev. 3.00 Mar 21, 2006 page xv of xxviii
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