DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 245

• Manufacturer Part Number: DF3052BX25V
• Description: MCU 5V 512K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of DF3052BX25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

As in I/O mode, MAR and IOAR specify the source and destination addresses. MAR specifies a
24-bit source or destination address. IOAR specifies the lower 8 bits of a fixed address. The upper
16 bits are all 1s. IOAR is not incremented or decremented.
Figure 8.6 illustrates how repeat mode operates.
The transfer count is specified as an 8-bit value in ETCRH and ETCRL. The maximum transfer
count is 255, obtained by setting both ETCRH and ETCRL to H'FF.
Transfers can be requested (activated) by compare match/input capture A interrupts from ITU
channels 0 to 3, transmit-data-empty and receive-data-full interrupts from SCI channel 0, and
external request signals.
For the detailed settings see section 8.2.4, Data Transfer Control Registers (DTCR).
Address T
Address B
Figure 8.6 Operation in Repeat Mode
1 byte or word is
transferred per request
Legend:
L = initial setting of MAR
N = initial setting of ETCRH and ETCRL
Address T = L
Address B = L + (–1)
Transfer
Rev. 3.00 Mar 21, 2006 page 215 of 814
DTID
•
(2
Section 8 DMA Controller
DTSZ
•
N – 1)
REJ09B0302-0300
IOAR