DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 457

• Manufacturer Part Number: DF3052BX25V
• Description: MCU 5V 512K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of DF3052BX25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bit 6—Timer Mode Select (WT/IT IT IT IT): Selects whether to use the WDT as a watchdog timer or
interval timer. If used as an interval timer, the WDT generates an interval timer interrupt request
when TCNT overflows. If used as a watchdog timer, the WDT generates a reset signal when
TCNT overflows.
Bit 5—Timer Enable (TME): Selects whether TCNT runs or is halted.
When WT/IT = 1, clear the SYSCR software standby bit (SSBY) to 0, then set the TME to 1.
When SSBY is set to 1, clear TME to 0.
Bits 4 and 3—Reserved: Read-only bits, always read as 1.
Bits 2 to 0—Clock Select 2 to 0 (CKS2/1/0): These bits select one of eight internal clock sources,
obtained by prescaling the system clock ( ), for input to TCNT.
Bit 6: WT/IT IT IT IT
0
1
Bit 5: TME
0
1
Bit 2: CKS2
0
1
Description
Interval timer: requests interval timer interrupts
Watchdog timer: generates a reset signal
Description
TCNT is initialized to H'00 and halted
TCNT is counting and CPU interrupt requests are enabled
Bit 1: CKS1
0
1
0
1
Bit 0: CKS0
0
1
0
1
0
1
0
1
Rev. 3.00 Mar 21, 2006 page 427 of 814
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Section 12 Watchdog Timer
REJ09B0302-0300
(Initial value)
(Initial value)
(Initial value)