DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 459

MCU 5V 512K 100-TQFP

DF3052BX25V

Manufacturer Part Number
DF3052BX25V
Description
MCU 5V 512K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of DF3052BX25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF3052BX25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Bit 6—Reserved: Do not set to 1.
Bits 5 to 0—Reserved: Read-only bits, always read as 1.
12.2.4
The watchdog timer’s TCNT, TCSR, and RSTCSR registers differ from other registers in being
more difficult to write. The procedures for writing and reading these registers are given below.
Writing to TCNT and TCSR: These registers must be written by a word transfer instruction.
They cannot be written by byte instructions. Figure 12.2 shows the format of data written to TCNT
and TCSR. TCNT and TCSR both have the same write address. The write data must be contained
in the lower byte of the written word. The upper byte must contain H'5A (password for TCNT) or
H'A5 (password for TCSR). This transfers the write data from the lower byte to TCNT or TCSR.
Writing to RSTCSR: RSTCSR must be written by a word transfer instruction. It cannot be
written by byte transfer instructions. Figure 12.3 shows the format of data written to RSTCSR. To
write 0 in the WRST bit, the write data must have H'A5 in the upper byte and H'00 in the lower
byte. The H'00 in the lower byte clears the WRST bit in RSTCSR to 0.
TCNT write
TCSR write
Note:
Writing 0 in WRST bit
Note:
Notes on Register Access
Address
Address
Address
*
*
Lower 16 bits of the address.
Lower 16 bits of the address.
Figure 12.2 Format of Data Written to TCNT and TCSR
Figure 12.3 Format of Data Written to RSTCSR
H'FFA8*
H'FFA8*
H'FFAA*
15
15
15
H'5A
H'A5
H'A5
Rev. 3.00 Mar 21, 2006 page 429 of 814
8 7
8 7
8 7
Section 12 Watchdog Timer
Write data
Write data
H'00
REJ09B0302-0300
0
0
0

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