DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 473
DF3052BX25V
Manufacturer Part Number
DF3052BX25V
Description
MCU 5V 512K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Specifications of DF3052BX25V
Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Part Number:
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Bit 3—Stop Bit Length (STOP): Selects one or two stop bits in asynchronous mode. This setting
is used only in asynchronous mode. In synchronous mode no stop bit is added, so the STOP bit
setting is ignored.
Notes: 1. One stop bit (with value 1) is added at the end of each transmitted character.
In receiving, only the first stop bit is checked, regardless of the STOP bit setting. If the second
stop bit is 1 it is treated as a stop bit. If the second stop bit is 0 it is treated as the start bit of the
next incoming character.
Bit 2—Multiprocessor Mode (MP): Selects a multiprocessor format. When a multiprocessor
format is selected, parity settings made by the PE and O/E bits are ignored. The MP bit setting is
valid only in asynchronous mode. It is ignored in synchronous mode.
For further information on the multiprocessor communication function, see section 13.3.3,
Multiprocessor Communication.
Bits 1 and 0—Clock Select 1 and 0 (CKS1/0): These bits select the clock source of the on-chip
baud rate generator. Four clock sources are available: , /4, /16, and /64.
For the relationship between the clock source, bit rate register setting, and baud rate, see section
13.2.8, Bit Rate Register (BRR).
Bit 3: STOP
0
1
Bit 2: MP
0
1
Bit 1: CKS1
0
1
2. Two stop bits (with value 1) are added at the end of each transmitted character.
Description
One stop bit *
Two stop bits *
Description
Multiprocessor function disabled
Multiprocessor format selected
Bit 0: CKS0
0
1
0
1
1
2
Description
/4
/16
/64
Section 13 Serial Communication Interface
Rev. 3.00 Mar 21, 2006 page 443 of 814
REJ09B0302-0300
(Initial value)
(Initial value)
(Initial value)
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