DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 584

• Manufacturer Part Number: DF3052BX25V
• Description: MCU 5V 512K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of DF3052BX25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 17 RAM
Bit 0—RAM Enable (RAME): Enables or disables the on-chip RAM. The RAME bit is
initialized at the rising edge of the input at the RES pin. It is not initialized in software standby
mode.
17.3
When the RAME bit is set to 1, the on-chip RAM is enabled. Accesses to addresses H'FDF10 to
H'FFF0F in the H8/3052BF in modes 1, 2, 5, and 7, addresses H'FFDF10 to H'FFFF0F in the
H8/3052BF in modes 3, 4, and 6 are directed to the on-chip RAM. In modes 1 to 6 (expanded
modes), when the RAME bit is cleared to 0, the external address space is accessed. In mode 7
(single-chip mode), when the RAME bit is cleared to 0, the on-chip RAM is not accessed: read
access always results in H'FF data, and write access is ignored.
Since the on-chip RAM is connected to the CPU by an internal 16-bit data bus, it can be written
and read by word access. It can also be written and read by byte access. Byte data is accessed in
two states using the upper 8 bits of the data bus. Word data starting at an even address is accessed
in two states using all 16 bits of the data bus.
Rev. 3.00 Mar 21, 2006 page 554 of 814
REJ09B0302-0300
Bit 0: RAME
0
1
Operation
Description
On-chip RAM is disabled
On-chip RAM is enabled
(Initial value)