DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 200

• Manufacturer Part Number: DF3052BX25V
• Description: MCU 5V 512K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of DF3052BX25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 7 Refresh Controller
Example 4: Connection to Multiple 4-Mbit DRAM Chips (16-Mbyte Mode): Figure 7.13
shows an example of interconnections to two 2CAS 4-Mbit DRAM chips, and the corresponding
address map. Up to four DRAM chips can be connected to area 3 by decoding upper address bits
A
Figure 7.14 shows a setup procedure to be followed by a program for this example. The DRAM in
this example has 9-bit row addresses and 9-bit column addresses. Both chips must be refreshed
simultaneously, so the RFSH pin must be used.
Rev. 3.00 Mar 21, 2006 page 170 of 814
REJ09B0302-0300
19
Figure 7.13 Interconnections and Address Map for Multiple 2CAS
and A
20
.
H8/3052BF
H'600000
H'67FFFF
H'680000
H'6FFFFF
H'700000
H'7FFFFF
D
A to A
15
9
RFSH
HWR
to D
LWR
CS
A
RD
19
1
3
0
DRAM area
DRAM area
Not used
No. 1
No. 2
a. Interconnections (example)
b. Address map
(Example)
Area 3 (16-Mbyte mode)
2 CAS 4-Mbit DRAM with 9-bit
row address, 9-bit column
address, and
A to A
RAS
UCAS
LCAS
WE
OE
I/O
A to A
RAS
UCAS
LCAS
WE
OE
I/O
8
8
15
15
CAS 4-Mbit DRAM Chips
CAS
CAS
to I/O
to I/O
0
0
0
0
16-bit organization
No. 1
No. 2