DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 293

MCU 5V 512K 100-TQFP

DF3052BX25V

Manufacturer Part Number
DF3052BX25V
Description
MCU 5V 512K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of DF3052BX25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF3052BX25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
9.6.2
Table 9.8 summarizes the registers of port 5.
Table 9.8
Address *
H'FFC8
H'FFCA
H'FFDB
Note: * Lower 16 bits of the address.
Port 5 Data Direction Register (P5DDR)
P5DDR is an 8-bit write-only register that can select input or output for each pin in port 5.
Bit
Modes
1 to 4
Modes
5 to 7
Modes 1 to 4 (Expanded Modes with On-Chip ROM Disabled)
P5DDR values are fixed at 1 and cannot be modified. Port 5 functions as an address bus. The
reserved bits (P5
Modes 5 and 6 (Expanded Modes with On-Chip ROM Enabled)
Following a reset, port 5 is an input port. A pin in port 5 becomes an address output pin if the
corresponding P5DDR bit is set to 1, and an input port if this bit is cleared to 0.
Mode 7 (Single-Chip Mode)
Port 5 functions as an input/output port. A pin in port 5 becomes an output port if the
corresponding P5DDR bit is set to 1, and an input port if this bit is cleared to 0.
Initial value
Read/Write
Initial value
Read/Write
Register Configuration
Port 5 Registers
Name
Port 5 data direction
register
Port 5 data register
Port 5 input pull-up MOS
control register
7
DDR to P5
7
1
1
Reserved bits
4
6
1
1
DDR) are also fixed at 1.
Abbreviation
P5DDR
P5DR
P5PCR
5
1
1
4
1
1
Rev. 3.00 Mar 21, 2006 page 263 of 814
R/W
W
R/W
R/W
P5 DDR
3
W
3
1
0
Port 5 data direction 3 to 0
These bits select input or
output for port 5 pins
Modes 1 to 4
H'FF
H'F0
H'F0
P5 DDR
2
W
2
1
0
Initial Value
Section 9 I/O Ports
P5 DDR
REJ09B0302-0300
1
W
1
1
0
Modes 5 to 7
H'F0
H'F0
H'F0
P5 DDR
0
W
0
1
0

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