DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 20

• Manufacturer Part Number: DF3052BX25V
• Description: MCU 5V 512K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of DF3052BX25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

6.3
6.4
Section 7 Refresh Controller
7.1
7.2
7.3
7.4
7.5
Section 8 DMA Controller
8.1
Rev. 3.00 Mar 21, 2006 page xviii of xxviii
Operation........................................................................................................................... 119
6.3.1
6.3.2
6.3.3
6.3.4
6.3.5
6.3.6
6.3.7
Usage Notes ...................................................................................................................... 142
6.4.1
6.4.2
6.4.3
6.4.4
Overview........................................................................................................................... 145
7.1.1
7.1.2
7.1.3
7.1.4
Register Descriptions ........................................................................................................ 149
7.2.1
7.2.2
7.2.3
7.2.4
Operation........................................................................................................................... 155
7.3.1
7.3.2
7.3.3
7.3.4
Interrupt Source................................................................................................................. 182
Usage Notes ...................................................................................................................... 182
Overview........................................................................................................................... 185
8.1.1
8.1.2
8.1.3
8.1.4
8.1.5
Area Division ....................................................................................................... 119
Chip Select Signals .............................................................................................. 121
Data Bus............................................................................................................... 122
Bus Control Signal Timing .................................................................................. 123
Wait Modes.......................................................................................................... 131
Interconnections with Memory (Example) .......................................................... 137
Bus Arbiter Operation.......................................................................................... 139
Connection to Dynamic RAM and Pseudo-Static RAM...................................... 142
Register Write Timing ......................................................................................... 142
BREQ Input Timing............................................................................................. 144
Transition to Software Standby Mode ................................................................. 144
Features................................................................................................................ 145
Block Diagram ..................................................................................................... 147
Pin Configuration................................................................................................. 148
Register Configuration......................................................................................... 148
Refresh Control Register (RFSHCR)................................................................... 149
Refresh Timer Control/Status Register (RTMCSR) ............................................ 152
Refresh Timer Counter (RTCNT)........................................................................ 153
Refresh Time Constant Register (RTCOR) ......................................................... 154
Overview.............................................................................................................. 155
DRAM Refresh Control ....................................................................................... 157
Pseudo-Static RAM Refresh Control ................................................................... 172
Interval Timer ...................................................................................................... 176
Features................................................................................................................ 185
Block Diagram ..................................................................................................... 186
Functional Overview............................................................................................ 187
Pin Configuration................................................................................................. 189
Register Configuration......................................................................................... 189
................................................................................................ 185
............................................................................................ 145