DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 610

• Manufacturer Part Number: DF3052BX25V
• Description: MCU 5V 512K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of DF3052BX25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 18 ROM
Notes: 1. The mode pin and FWE pin input must satisfy the mode programming setup time
18.6.2
When set to the user program mode, this LSI can erase and program its flash memory by executing
a user program. Therefore, on-chip flash memory on-board programming can be performed by
providing a means of controlling FWE and supplying the write data on the board and providing a
write program in a part of the program area.
To select this mode, set the LSI to on-chip ROM enable modes 5, 6, and 7 and apply a high level
to the FWE pin. In this mode, the peripheral functions, other than flash memory, are performed the
same as in modes 5, 6, and 7.
Since the flash memory cannot be read while it is being programmed/erased, place a programming
program on external memory, or transfer the programming program to RAM area, and execute it
in the RAM.
Figure 18.10 shows the procedure for executing when transferred to on-chip RAM. During reset
start, starting from the user program mode is possible.
Rev. 3.00 Mar 21, 2006 page 580 of 814
REJ09B0302-0300
2. For notes on FWE pin High/Low, see section 18.11, Notes on Flash Memory
3. See section 4.2.2, Reset Sequence and 18.11, Notes on Flash Memory
User Program Mode
(t
Programming/Erasing.
Programming/Erasing. The H8/3052BF requires a minimum of 20 system clocks.
MDS
) relative to the reset clear timing.
H8/3052B F-ZTAT
Figure 18.9 Recommended System Block Diagram
CSn
MD2
MD1
MD0
FWE
RES
System
control
unit
memory,
External
etc.