DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 93

• Manufacturer Part Number: DF3052BX25V
• Description: MCU 5V 512K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of DF3052BX25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

3.4
3.4.1
Ports 1, 2, and 5 function as address pins A
address space. The initial bus mode after a reset is 8 bits, with 8-bit access to all areas. If at least
one area is designated for 16-bit access in ABWCR, the bus mode switches to 16 bits.
3.4.2
Ports 1, 2, and 5 function as address pins A
address space. The initial bus mode after a reset is 16 bits, with 16-bit access to all areas. If all
areas are designated for 8-bit access in ABWCR, the bus mode switches to 8 bits.
3.4.3
Ports 1, 2, and 5 and part of port A function as address pins A
maximum 16-Mbyte address space. The initial bus mode after a reset is 8 bits, with 8-bit access to
all areas. If at least one area is designated for 16-bit access in ABWCR, the bus mode switches to
16 bits. A
(BRCR). (In this mode A
3.4.4
Ports 1, 2, and 5 and part of port A function as address pins A
maximum 16-Mbyte address space. The initial bus mode after a reset is 16 bits, with 16-bit access
to all areas. If all areas are designated for 8-bit access in ABWCR, the bus mode switches to
8 bits. A
used for address output.)
3.4.5
Ports 1, 2, and 5 can function as address pins A
address space, but following a reset they are input ports. To use ports 1, 2, and 5 as an address bus,
the corresponding bits in their data direction registers (P1DDR, P2DDR, and P5DDR) must be set
to 1. The initial bus mode after a reset is 8 bits, with 8-bit access to all areas. If at least one area is
designated for 16-bit access in ABWCR, the bus mode switches to 16 bits.
23
23
Mode 5
Operating Mode Descriptions
Mode 1
Mode 2
Mode 3
Mode 4
to A
to A
21
21
are valid when 0 is written in bits 7 to 5 of BRCR. (In this mode A
are valid when 0 is written in bits 7 to 5 of the bus release control register
20
is always used for address output.)
19
19
to A
to A
19
to A
0
0
, permitting access to a maximum 1-Mbyte
, permitting access to a maximum 1-Mbyte
0
, permitting access to a maximum 1-Mbyte
Rev. 3.00 Mar 21, 2006 page 63 of 814
23
23
to A
to A
Section 3 MCU Operating Modes
0
0
, permitting access to a
, permitting access to a
REJ09B0302-0300
20
is always