DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 122

MCU 5V 512K 100-TQFP

DF3052BX25V

Manufacturer Part Number
DF3052BX25V
Description
MCU 5V 512K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of DF3052BX25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF3052BX25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 5 Interrupt Controller
5.3
The interrupt sources include external interrupts (NMI, IRQ
5.3.1
There are seven external interrupts: NMI, and IRQ
can be used to exit software standby mode.
NMI: NMI is the highest-priority interrupt and is always accepted, regardless of the states of the
I and UI bits in CCR. The NMIEG bit in SYSCR selects whether an interrupt is requested by the
rising or falling edge of the input at the NMI pin. NMI interrupt exception handling has vector
number 7.
IRQ
The IRQ
Figure 5.2 shows a block diagram of interrupts IRQ
Rev. 3.00 Mar 21, 2006 page 92 of 814
REJ09B0302-0300
IRQn
Note: n = 5 to 0
ISCR settings can select whether an interrupt is requested by the low level of the input at pins
IRQ
IER settings can enable or disable the IRQ
assigned by four bits in IPRA (IPRA7 to IPRA4).
The status of IRQ
to 0 by software.
0
to IRQ
0
input
0
to IRQ
Interrupt Sources
External Interrupts
to IRQ
5
Interrupts: These interrupts are requested by input signals at pins IRQ
5
, or by the falling edge.
5
interrupts have the following features.
Figure 5.2 Block Diagram of Interrupts IRQ
0
to IRQ
5
sense circuit
Edge/level
interrupt requests is indicated in ISR. The ISR flags can be cleared
IRQnSC
Clear signal
0
to IRQ
0
0
to IRQ
to IRQ
5
S
R
interrupts. Interrupt priority levels can be
IRQnF
5
. Of these, NMI, IRQ
0
5
.
to IRQ
Q
IRQnE
5
0
) and 30 internal interrupts.
to IRQ
5
0
IRQn interrupt
request
, IRQ
0
1
to IRQ
, and IRQ
5
.
2

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