DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 377

MCU 5V 512K 100-TQFP

DF3052BX25V

Manufacturer Part Number
DF3052BX25V
Description
MCU 5V 512K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of DF3052BX25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF3052BX25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Input Capture Function: The TCNT value can be captured into a general register when a
transition occurs at an input capture/output compare pin (TIOCA or TIOCB). Capture can take
place on the rising edge, falling edge, or both edges. The input capture function can be used to
measure pulse width or period.
TCNT input
clock
TCNT
GR
Compare
match signal
TIOCA,
TIOCB
Output compare timing
The compare match signal is generated in the last state in which TCNT and the general register
match (when TCNT changes from the matching value to the next value). When the compare
match signal is generated, the output value selected in TIOR is output at the output compare
pin (TIOCA or TIOCB). When TCNT matches a general register, the compare match signal is
not generated until the next counter clock pulse.
Figure 10.22 shows the output compare timing.
Sample setup procedure for input capture
Figure 10.23 shows a sample procedure for setting up input capture.
Figure 10.22 Output Compare Timing
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Section 10 16-Bit Integrated Timer Unit (ITU)
Rev. 3.00 Mar 21, 2006 page 347 of 814
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REJ09B0302-0300

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