DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 202

• Manufacturer Part Number: DF3052BX25V
• Description: MCU 5V 512K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of DF3052BX25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 7 Refresh Controller
7.3.3
Refresh Request Interval and Refresh Cycle Execution: The refresh request interval is
determined as in a DRAM interface, by the settings of RTCOR and bits CKS2 to CKS0 in
RTMCSR. The numbers of states required for pseudo-static RAM read/write cycles and refresh
cycles are the same as for DRAM (see table 7.4). The state transitions are as shown in figure 7.3.
Pseudo-Static RAM Control Signals: Figure 7.15 shows the control signals for pseudo-static
RAM read, write, and refresh cycles.
Rev. 3.00 Mar 21, 2006 page 172 of 814
REJ09B0302-0300
Address
bus
CS
RD
HWR
LWR
RFSH
AS
Note:
3
*
Pseudo-Static RAM Refresh Control
16-bit access
Figure 7.15 Pseudo-Static RAM Control Signal Output Timing
Read cycle
Write cycle *
Area 3 top address
Refresh cycle