DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 362

MCU 5V 512K 100-TQFP

DF3052BX25V

Manufacturer Part Number
DF3052BX25V
Description
MCU 5V 512K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of DF3052BX25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF3052BX25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 10 16-Bit Integrated Timer Unit (ITU)
Bits 6 to 4—I/O Control B2 to B0 (IOB2 to IOB0): These bits select the GRB function.
Bit 6:
IOB2
0
1
Notes: 1. After a reset, the output is 0 until the first compare match.
Bit 3—Reserved: Read-only bit, always read as 1.
Bits 2 to 0—I/O Control A2 to A0 (IOA2 to IOA0): These bits select the GRA function.
Bit 2:
IOA2
0
1
Notes: 1. After a reset, the output is 0 until the first compare match.
Rev. 3.00 Mar 21, 2006 page 332 of 814
REJ09B0302-0300
2. Channel 2 output cannot be toggled by compare match. This setting selects 1 output
2. Channel 2 output cannot be toggled by compare match. This setting selects 1 output
Bit 5:
IOB1
0
1
0
1
Bit 1:
IOA1
0
1
0
1
instead.
instead.
Bit 4:
IOB0
0
1
0
1
0
1
0
1
Bit 0:
IOA0
0
1
0
1
0
1
0
1
Description
GRB is an output
compare register
GRB is an input
capture register
Description
GRA is an output
compare register
GRA is an input
capture register
No output at compare match (Initial value)
0 output at GRB compare match *
1 output at GRB compare match *
Output toggles at GRB compare match
(1 output in channel 2) *
GRB captures rising edge of input
GRB captures falling edge of input
GRB captures both edges of input
No output at compare match (Initial value)
0 output at GRA compare match *
1 output at GRA compare match *
Output toggles at GRA compare match
(1 output in channel 2) *
GRA captures rising edge of input
GRA captures falling edge of input
GRA captures both edges of input
1
1
*
*
2
2
1
1
1
1

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