DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 89

MCU 5V 512K 100-TQFP

DF3052BX25V

Manufacturer Part Number
DF3052BX25V
Description
MCU 5V 512K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of DF3052BX25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF3052BX25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
3.1
3.1.1
The H8/3052BF has seven operating modes (modes 1 to 7) that are selected by the mode pins
(MD
space and the initial bus mode.
Table 3.1
Operating
Mode *
Mode 1
Mode 2
Mode 3
Mode 4
Mode 5
Mode 6
Mode 7
Notes: 1. In modes 1 to 6, an 8-bit or 16-bit data bus can be selected on a per-area basis by
For the address space size there are two choices: 1 Mbyte or 16 Mbytes. The external data bus is
either 8 or 16 bits wide depending on ABWCR settings. If 8-bit access is selected for all areas, the
external data bus is 8 bits wide. For details see section 6, Bus Controller.
Modes 1 to 4 are externally expanded modes that enable access to external memory and peripheral
devices and disable access to the on-chip ROM. Modes 1 and 2 support a maximum address space
of 1 Mbyte. Modes 3 and 4 support a maximum address space of 16 Mbytes.
2
to MD
3
2. If the RAME bit in SYSCR is cleared to 0, these addresses become external addresses.
3. These are the operating modes when the FWE pin is at 0. For the operating modes
Overview
Operating Mode Selection
settings made in the area bus width control register (ABWCR). For details see section
6, Bus Controller.
when the FWE pin is at 1, see section 18, ROM.
0
Operating Mode Selection
) as indicated in table 3.1. The input at these pins determines the size of the address
MD
0
0
0
0
1
1
1
1
2
Mode Pins
MD
0
0
1
1
0
0
1
1
Section 3 MCU Operating Modes
1
MD
0
1
0
1
0
1
0
1
0
Address Space
Expanded mode
Expanded mode
Expanded mode
Expanded mode
Expanded mode
Expanded mode
Single-chip advanced
mode
Rev. 3.00 Mar 21, 2006 page 59 of 814
Initial Bus
Mode *
8 bits
16 bits
8 bits
16 bits
8 bits
8 bits
Description
Section 3 MCU Operating Modes
1
On-Chip
ROM
Disabled
Disabled
Disabled
Disabled
Enabled
Enabled
Enabled
REJ09B0302-0300
On-Chip
RAM
Enabled *
Enabled *
Enabled *
Enabled *
Enabled *
Enabled *
Enabled
2
2
2
2
2
2

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