DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 118

MCU 5V 512K 100-TQFP

DF3052BX25V

Manufacturer Part Number
DF3052BX25V
Description
MCU 5V 512K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of DF3052BX25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF3052BX25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 5 Interrupt Controller
Bit 7—Priority Level B7 (IPRB7): Selects the priority level of ITU channel 3 interrupt requests.
Bit 6—Priority Level B6 (IPRB6): Selects the priority level of ITU channel 4 interrupt requests.
Bit 5—Priority Level B5 (IPRB5): Selects the priority level of DMAC interrupt requests
(channels 0 and 1).
Bit 4—Reserved: This bit can be written and read, but it does not affect interrupt priority.
Bit 3—Priority Level B3 (IPRB3): Selects the priority level of SCI channel 0 interrupt requests.
Bit 2—Priority Level B2 (IPRB2): Selects the priority level of SCI channel 1 interrupt requests.
Rev. 3.00 Mar 21, 2006 page 88 of 814
REJ09B0302-0300
Bit 7: IPRB7
0
1
Bit 6: IPRB6
0
1
Bit 5: IPRB5
0
1
Bit 3: IPRB3
0
1
Bit 2: IPRB2
0
1
Description
ITU channel 3 interrupt requests have priority level 0 (low priority) (Initial value)
ITU channel 3 interrupt requests have priority level 1 (high priority)
Description
ITU channel 4 interrupt requests have priority level 0 (low priority) (Initial value)
ITU channel 4 interrupt requests have priority level 1 (high priority)
Description
DMAC interrupt requests (channels 0 and 1) have priority level 0 (low priority)
DMAC interrupt requests (channels 0 and 1) have priority level 1 (high priority)
Description
SCI0 interrupt requests have priority level 0 (low priority)
SCI0 interrupt requests have priority level 1 (high priority)
Description
SCI1 interrupt requests have priority level 0 (low priority)
SCI1 interrupt requests have priority level 1 (high priority)
(Initial value)
(Initial value)
(Initial value)

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