DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 407

• Manufacturer Part Number: DF3052BX25V
• Description: MCU 5V 512K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of DF3052BX25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Timing of Disabling of ITU Output by External Trigger: If the XTGD bit is cleared to 0 in
TOCR in reset-synchronized PWM mode or complementary PWM mode, when an input capture A
signal occurs in channel 1, the master enable bits are cleared to 0 in TOER, disabling ITU output.
Figure 10.55 shows the timing.
Timing of Output Inversion by TOCR: The output levels in reset-synchronized PWM mode and
complementary PWM mode can be inverted by inverting the output level select bits (OLS4 and
OLS3) in TOCR. Figure 10.56 shows the timing.
Figure 10.56 Timing of Inverting of ITU Output Level by Writing to TOCR (Example)
TIOCA
Input capture
signal
TOER
ITU output
pins
Legend:
N: Arbitrary setting (H'C1 to H'FF)
Figure 10.55 Timing of Disabling of ITU Output by External Trigger (Example)
1
pin
Address bus
TOCR
ITU output pin
ITU output
ITU output
N
T
1
H'C0
TOCR address
Generic
input/output
T
Section 10 16-Bit Integrated Timer Unit (ITU)
2
I/O port
Rev. 3.00 Mar 21, 2006 page 377 of 814
T
3
ITU output
N
Inverted
ITU output
REJ09B0302-0300
H'C0
I/O port
Generic
input/output