DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 507
DF3052BX25V
Manufacturer Part Number
DF3052BX25V
Description
MCU 5V 512K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Specifications of DF3052BX25V
Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF3052BX25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Receiving Multiprocessor Serial Data
Figure 13.12 shows a sample flowchart for receiving multiprocessor serial data and indicates
the procedure to follow.
No
No
No
Figure 13.12 Sample Flowchart for Receiving Multiprocessor Serial Data (1)
Read ORER and FER flags in SSR
Read ORER and FER flags in SSR
Read receive data from RDR
Read receive data from RDR
Set MPIE bit to 1 in SCR
Read RDRF flag in SSR
Read RDRF flag in SSR
Clear RE bit to 0 in SCR
Finished receiving?
FER
FER
Start receiving
RDRF = 1?
RDRF = 1?
Own ID?
Initialize
End
ORER = 1
ORER = 1
Yes
Yes
Yes
No
No
Yes
No
Yes
Yes
3
1
2
No
(continued on next page)
Error handling
4
5
Section 13 Serial Communication Interface
Rev. 3.00 Mar 21, 2006 page 477 of 814
1. SCI initialization: the receive data
2. ID receive cycle: set the MPIE bit to 1
3. SCI status check and ID check: read
4. SCI status check and data receiving:
5. Receive error handling and break
function of the RxD pin is selected
automatically.
in SCR.
SSR, check that the RDRF flag is set
to 1, then read data from RDR and
compare with the processor’s own ID.
If the ID does not match, set the MPIE
bit to 1 again and clear the RDRF flag
to 0. If the ID matches, clear the RDRF
flag to 0.
read SSR, check that the RDRF flag is
set to 1, then read data from RDR.
detection: if a receive error occurs,
read the ORER and FER flags in SSR
to identify the error. After executing the
necessary error handling, clear the
ORER and FER flags both to 0.
Receiving cannot resume while either
the ORER or FER flag remains set to
1. When a framing error occurs, the
RxD pin can be read to detect the
break state.
REJ09B0302-0300
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