DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 123

MCU 5V 512K 100-TQFP

DF3052BX25V

Manufacturer Part Number
DF3052BX25V
Description
MCU 5V 512K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of DF3052BX25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF3052BX25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Figure 5.3 shows the timing of the setting of the interrupt flags (IRQnF).
Interrupts IRQ
whether the corresponding pin is set for input or output. When using a pin for external interrupt
input, clear its DDR bit to 0 and do not use the pin for chip select output, refresh output, or SCI
input or output.
5.3.2
Thirty internal interrupts are requested from the on-chip supporting modules.
5.3.3
Table 5.3 lists the interrupt sources, their vector addresses, and their default priority order. In the
default priority order, smaller vector numbers have higher priority. The priority of interrupts other
than NMI can be changed in IPRA and IPRB. The priority order after a reset is the default order
shown in table 5.3.
Each on-chip supporting module has status flags for indicating interrupt status, and enable bits
for enabling or disabling interrupts.
Interrupt priority levels can be assigned in IPRA and IPRB.
ITU and SCI interrupt requests can activate the DMAC, in which case no interrupt request is
sent to the interrupt controller, and the I and UI bits are disregarded.
IRQn
input pin
IRQnF
Note: n = 5 to 0
Internal Interrupts
Interrupt Exception Vector Table
0
to IRQ
5
have vector numbers 12 to 17. These interrupts are detected regardless of
Figure 5.3 Timing of Setting of IRQnF
Rev. 3.00 Mar 21, 2006 page 93 of 814
Section 5 Interrupt Controller
REJ09B0302-0300

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