DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 209

• Manufacturer Part Number: DF3052BX25V
• Description: MCU 5V 512K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of DF3052BX25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Contention between RTCOR Write and Compare Match: If a compare match occurs in the T
state of an RTCOR write cycle, writing takes priority and the compare match signal is inhibited.
See figure 7.22.
RTCNT Operation at Internal Clock Source Switchover: Switching internal clock sources may
cause RTCNT to increment, depending on the switchover timing. Table 7.9 shows the relation
between the time of the switchover (by writing to bits CKS2 to CKS0) and the operation of
RTCNT.
The RTCNT input clock is generated from the internal clock source by detecting the falling edge
of the internal clock. If a switchover is made from a high clock source to a low clock source, as in
case No. 3 in table 7.9, the switchover will be regarded as a falling edge, an RTCNT clock pulse
will be generated, and RTCNT will be incremented.
Figure 7.22 Contention between RTCOR Write and Compare Match
Address bus
Internal
write signal
RTCNT
RTCOR
Compare
match signal
RTCOR write cycle by CPU
T
1
RTCNT address
N
N
T
2
Rev. 3.00 Mar 21, 2006 page 179 of 814
RTCOR write data
T
3
Section 7 Refresh Controller
N + 1
Inhibited
M
REJ09B0302-0300
3