DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 269

MCU 5V 512K 100-TQFP

DF3052BX25V

Manufacturer Part Number
DF3052BX25V
Description
MCU 5V 512K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of DF3052BX25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF3052BX25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
8.5
The DMAC generates only DMA-end interrupts. Table 8.13 lists the interrupts and their priority.
Table 8.13 DMAC Interrupts
Interrupt
DEND0A
DEND0B
DEND1A
DEND1B
Each interrupt is enabled or disabled by the DTIE bit in the corresponding data transfer control
register (DTCR). Separate interrupt signals are sent to the interrupt controller.
The interrupt priority order among channels is channel 0 > channel 1 and channel A > channel B.
Figure 8.25 shows the DMA-end interrupt logic. An interrupt is requested whenever DTE = 0 and
DTIE = 1.
The DMA-end interrupt for the B channels (DENDB) is unavailable in full address mode. The
DTME bit does not affect interrupt operations.
Interrupts
Short Address Mode
End of transfer on channel 0A
End of transfer on channel 0B
End of transfer on channel 1A
End of transfer on channel 1B
DTIE
DTE
Figure 8.25 DMA-End Interrupt Logic
Description
Full Address Mode
End of transfer on channel 0
End of transfer on channel 1
Rev. 3.00 Mar 21, 2006 page 239 of 814
DMA-end interrupt
Section 8 DMA Controller
REJ09B0302-0300
Interrupt
Priority
High
Low

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