DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 632

• Manufacturer Part Number: DF3052BX25V
• Description: MCU 5V 512K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of DF3052BX25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 18 ROM
4. Do not input a constant high level to the FWE pin.
5. Program/erase the flash memory in accordance with the recommended algorithms.
6. Do not set/clear the SWE bit while a program is executing on flash memory.
Rev. 3.00 Mar 21, 2006 page 602 of 814
REJ09B0302-0300
c. In the boot mode, perform FWE pin High/Low switching during reset.
d. In the user program mode, FWE = High/Low switching is possible regardless of the RES
e. Apply an input to FWE when the program is not running away.
f. Release FWE pin input only when the SWE1, ESU1, PSU1, EV1, PV1, E1, and P1 bits in
To prevent erroneous programming/erasing in the event of program runaway, etc., input a high
level to the FWE pin only when programming/erasing flash memory (including flash memory
emulation by RAM). Avoid system configurations that constantly input a high level to the
FWE pin. Handle program runaway, etc. by starting the watchdog timer so that flash memory
is not overprogrammed/overerased even while a high level is input to the FWE pin.
The recommended algorithms can program/erase the flash memory without applying voltage
stress to the device or sacrificing the reliability of the program data.
When setting the PSU1 and ESU1 bits in FLMCR1, or PSU2 and ESU2 bits in FLMCR2 set
the watchdog timer for program runaway, etc.
Accesses to flash memory by means of an MOV instruction, etc., are prohibited while bit
P1/P2 or bit E1/E2 is set.
Before performing flash memory program execution or data read, clear the SWE bit.
If the SWE bit is set, the flash data can be reprogrammed, but flash memory cannot be
accessed for purposes other than verify (verify during programming/erase).
In transition to the boot mode, input FWE = High level and set MD
input is low. At this time, the FWE and MD
programming setup time (t
setup time is necessary for RES reset timing even in transition from the boot mode to
another mode.
In reset during operation, the RES pin must be held at a low level for at least 20 system
clocks.
input.
FWE input switching is also possible during program execution on flash memory.
When applying an input to the FWE pin, the program execution state must be supervised
using a watchdog timer, etc.
FLMCR1, and the SWE2, ESU2, PSU2, EV2, PV2, E2, and P2 bits in FLMCR2, are
cleared.
Do not erroneously set any of bits SWE1, ESU1, PSU1, EV1, PV1, E1, P1, SWE2, ESU2,
PSU2, EV2, PV2, E2, or P2 when applying or releasing FWE.
MDS
) relative to the reset clear timing. The mode programming
2
to MD
0
inputs must satisfy the mode
2
to MD
0
while the RES