DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 304

MCU 5V 512K 100-TQFP

DF3052BX25V

Manufacturer Part Number
DF3052BX25V
Description
MCU 5V 512K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of DF3052BX25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF3052BX25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 9 I/O Ports
P8DDR is a write-only register. Its value cannot be read. All bits return 1 when read.
P8DDR is initialized to H'E0 or H'F0 by a reset and in hardware standby mode. The reset value
depends on the operating mode. In software standby mode P8DDR retains its previous setting. If a
P8DDR bit is set to 1, the corresponding pin maintains its output state in software standby mode.
Port 8 Data Register (P8DR)
P8DR is an 8-bit readable/writable register that stores output data for pins P8
in P8DDR is set to 1, if port 8 is read the value of the corresponding P8DR bit is returned. When a
bit in P8DDR is cleared to 0, if port 8 is read the corresponding pin level is read.
Bit
Initial value
Read/Write
Bits 7 to 5 are reserved. They cannot be modified and always are read as 1.
P8DR is initialized to H'E0 by a reset and in hardware standby mode. In software standby mode it
retains its previous setting.
Rev. 3.00 Mar 21, 2006 page 274 of 814
REJ09B0302-0300
Mode 7 (Single-Chip Mode)
Port 8 is a generic input/output port. A pin in port 8 becomes an output port if the
corresponding P8DDR bit is set to 1, and an input port if this bit is cleared to 0.
7
1
Reserved bits
6
1
5
1
R/W
P8
4
0
4
R/W
P8
3
0
Port 8 data 4 to 0
These bits store data
for port 8 pins
3
R/W
P8
2
0
2
4
R/W
P8
to P8
1
0
1
0
. When a bit
R/W
P8
0
0
0

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